System & Hardware Nodes#
High-level node abstractions for FPGA blocks, signal acquisition, and routing.
System Nodes
Object representing the entire FIREQ system. |
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Object representing the acquisition IP. |
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Object representing the signal generator system. |
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Object representing the trigger generator system. |
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Object representing the AXI-Stream switch IP. |
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Object representing the DMA IP. |
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Object representing an AXI-Stream FIFO. |