AXIS Trigger Generator#

This IP is responsable for generating all signals needed by other pheripherals to control the timing of an experiment. As such it signals when an experiment is started or restarted and when readout or generation shall occur.
for this reason, it generates two trigger words, one for the readout trigger and one for the drive trigger.
Each bit of the trigger words is to be considered its own channel, e.g.: bit #0 (LSB) of the drive_trigger_word will be referred to as channel 1 of the drive trigger word.

Communication Interfaces#

This module has two AXI interfaces:

  • one Lite interface which is used to control the Trigger Generator

  • one Full interface to fill the memory mapped FIFO

This module has two, N-bit outputs (N=TriggerWordWidth, see common_includes/COMMON_INCLUDES.vh), called drive_trigger_word and readout_trigger_word.
The *trigger_word can be used to control the timing of drive/readout gates and can generate up to 8k independently spaced triggers word within an interval of 2^42 clock cycles.

Mode of Operation#

This module has the responsibility to generate the required triggers to properly run an experiment.
In order to generate triggers, this IP includes one FIFO that stores the delay and the trigger mask. Once the delay runs out, triggers (a single clock cycle pulse) are generated on that drive/readout channel, depending on the trigger mask, and a new delay is read from the FIFO.
The IP has an internal experiment counter that, upon reaching zero, will start another shot.

Experiment definition#

In the context of this IP, the required parameters to define an experiment are:

  • The timing of the drive triggers for each channel

  • The timing of the readout trigger for each channel

  • The duration of each experiment shot

  • The number of shots to execute

The timing of the drive/readout triggers are stored in the Memory Mapped FIFO and each entry encodes:

  • a delay in clock cycles (bit 0 to 31)

  • if the delay shall generate a trigger for a specific channel (bit 32 to 46)

  • if the trigger word is a readout_trigger_word or drive_trigger_word (bit 47, if set to 1 is readout, drive otherwise)

The reason why one can choose to generate a trigger or not is to support cases when more that 2^32 clock cycles are required before generation of another trigger.
The FIFO is memory mapped, thus can be accessed as memories from the AXI Full interface but they are read by the IP in order (starting from the first entry).
The read pointer of the memory mapped FIFO is reset when a new experiment shot is started.

The experiment timer is encoded on 42 bit because there are a maximum of 8k delays for each drive channel, each with a width of 32 bits, thus the maximum duration of an experiment shot is 8k x 2^32, which can be encoded in 45 bits.
42 bits were chosen because using the maximum is not useful (maximum of 1 drive trigger per experiment).
The experiment shot duration is also encoded using this width and is used to know when a shot is complete.

When the experiment shot duration timer elapses, a new experiment shot is started if the number of shots to execute is different than 0. Note that, the actual number of shots that are executed is one more than the value set via the AXI Lite interface.

Setting the experiment parameters#

to do

Drivers#

To easily operate this IP on PYNQ overlays, drivers are available for download in the FIREQ Tools repository.
Drivers provide a good abstraction layer that will let you set up and use the IP without going into details on the implementation.

Creating the AXIS TRIGGER GENERATOR IP PROJECT#

To generate a copy of the axis trigger generator project:

  • create a directory called workspace/ in the root of this repo

  • move to that directory and source the vivado init script

  • open vivado

  • source the trigger_generator_project.tcl script located in this directory from the vivado tcl console

Set axisTriggerGeneratorIP.v as the top module for synthesis and implementation; otherwise, use triggerGeneratorIPTestBench.sv to simulate with Vivado’s AXI VIP masters to send data to the trigger generator.